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HFA1205
September 1998 File Number 3605.5
Dual, 400MHz, Low Power, Video Operational Amplifier
The HFA1205 is a dual, high speed, low power current feedback amplifier built with Intersil's proprietary complementary bipolar UHF-1 process. These amplifiers deliver 400MHz bandwidth and 1275V/s slew rate, on only 60mW of quiescent power. They are specifically designed to meet the performance, power, and cost requirements of high volume video applications. The excellent gain flatness and differential gain/phase performance make these amplifiers well suited for component or composite video applications. Video performance is maintained even when driving a back terminated cable (RL = 150), and degrades only slightly when driving two back terminated cables (RL = 75). RGB applications will benefit from the high slew rates, and high full power bandwidth. The HFA1205 is a pin compatible, low power, high performance upgrade for the popular Intersil HA5023. For a dual amplifier with output disable capability, please see the HFA1245 datasheet.
Features
* Low Supply Current . . . . . . . . . . . . . . . . . 5.8mA/Op Amp * High Input Impedance . . . . . . . . . . . . . . . . . . . . . . . 2M * Wide -3dB Bandwidth (AV = +2) . . . . . . . . . . . . . . 400MHz * Very Fast Slew Rate . . . . . . . . . . . . . . . . . . . . . . 1275V/s * Gain Flatness (to 50MHz) . . . . . . . . . . . . . . . . . . . . 0.03dB * Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03% * Differential Phase . . . . . . . . . . . . . . . . . . . . 0.03 Degrees * Pin Compatible Upgrade to HA5023
Applications
* Flash A/D Drivers * High Resolution Monitors * Video Switching and Routing * Professional Video Processing * Video Digitizing Boards/Systems * Multimedia Systems * RGB Preamps
Ordering Information
PART NUMBER (BRAND) HFA1205IP HFA1205IB (H1205I) HA5023EVAL TEMP. RANGE (oC) -40 to 85 -40 to 85 PACKAGE 8 Ld PDIP 8 Ld SOIC PKG. NO. E8.3 M8.15
* Medical Imaging * Hand Held and Miniaturized RF Equipment * Battery Powered Communications * High Speed Oscilloscopes and Analyzers
High Speed Op Amp DIP Evaluation Board
Pinout
HFA1205 (PDIP, SOIC) TOP VIEW
OUT1 -IN1 +IN1 V1 2 3 4 8 V+ OUT2 -IN2 +IN2
+ +
7 6 5
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HFA1205
Absolute Maximum Ratings
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11V DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSUPPLY Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8V Output Current (Note 2) . . . . . . . . . . . . . . . . .Short Circuit Protected 30mA Continuous 60mA 50% Duty Cycle ESD Rating Human Body Model (Per MIL-STD-883 Method 3015.7) . . . .600V
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 Maximum Junction Temperature (Die Only) . . . . . . . . . . . . . . . .175oC Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. JA is measured with the component mounted on an evaluation PC board in free air. 2. Output is short circuit protected to ground. Brief short circuits to ground will not degrade reliability, however continuous (100% duty cycle) output current must not exceed 30mA for maximum reliability.
Electrical Specifications
VSUPPLY = 5V, AV = +1, RF = 560, RL = 100, Unless Otherwise Specified (NOTE 3) TEST LEVEL TEMP. (oC)
PARAMETER INPUT CHARACTERISTICS Input Offset Voltage
TEST CONDITIONS
MIN
TYP
MAX
UNITS
A A
25 Full Full 25 85 -40 25 85 -40 25 Full Full 25 85 -40 25 85 -40 25 Full Full 25 85 -40
45 43 43 48 46 46 0.8 0.5 0.5 -
2 3 1 48 46 46 52 50 50 6 10 5 0.5 0.8 0.8 2 1.3 1.3 2 5 60 3 4 4
5 8 10 15 25 60 1 3 3 8.5 15 200 6 8 8
mV mV V/ oC dB dB dB dB dB dB A A nA/ oC A/V A/V A/V M M M A A nA/ oC A/V A/ V A/V
Average Input Offset Voltage Drift Input Offset Voltage Common-Mode Rejection Ratio VCM = 1.8V VCM = 1.8V VCM = 1.2V Input Offset Voltage Power Supply Rejection Ratio VPS = 1.8V VPS = 1.8V VPS = 1.2V Non-Inverting Input Bias Current
B A A A A A A A A
Non-Inverting Input Bias Current Drift Non-Inverting Input Bias Current Power Supply Sensitivity VPS = 1.8V VPS = 1.8V VPS = 1.2V Non-Inverting Input Resistance VCM = 1.8V VCM = 1.8V VCM = 1.2V Inverting Input Bias Current
B A A A A A A A A
Inverting Input Bias Current Drift Inverting Input Bias Current Common-Mode Sensitivity VCM = 1.8V VCM = 1.8V VCM = 1.2V
B A A A
2
HFA1205
Electrical Specifications
VSUPPLY = 5V, AV = +1, RF = 560, RL = 100, Unless Otherwise Specified (Continued) (NOTE 3) TEST LEVEL A A A C C A A f = 100kHz f = 100kHz f = 100kHz B B B TEMP. (oC) 25 85 -40 25 25 25, 85 -40 25 25 25
PARAMETER Inverting Input Bias Current Power Supply Sensitivity
TEST CONDITIONS VPS = 1.8V VPS = 1.8V VPS = 1.2V
MIN 1.8 1.2 -
TYP 2 4 4 60 1.6 2.4 1.7 3.5 2.5 20
MAX 5 8 8 -
UNITS A/V A/V A/V pF V V nV/Hz pA/Hz pA/Hz
Inverting Input Resistance Input Capacitance Input Voltage Common Mode Range (Implied by VIO CMRR, +RIN, and -IBIAS CMS tests) Input Noise Voltage Density Non-Inverting Input Noise Current Density Inverting Input Noise Current Density TRANSFER CHARACTERISTICS Open Loop Transimpedance Gain AC CHARACTERISTICS AV = -1
C
25
-
500
-
k
AV = +2, RF = 464, Unless Otherwise Specified AV = +1, +RS = 432 AV = +2 AV = -1, RF = 332 B B B B B B B B A 5MHz 10MHz B B 25 25 25 25 25 25 25 25 Full 25 25 280 400 360 140 125 180 0.02 0.03 1 -60 -54 MHz MHz MHz MHz MHz MHz dB dB V/V dB dB
-3dB Bandwidth (VOUT = 0.2VP-P)
Full Power Bandwidth (VOUT = 5VP-P at AV = +2/-1, 4VP-P at AV = +1) Gain Flatness (AV = +2,VOUT = 0.2VP-P)
AV = +1, RS = 432 AV = +2 AV = -1, RF = 332 To 25MHz To 50MHz
Minimum Stable Gain Crosstalk
OUTPUT CHARACTERISTICS RF = 560, Unless Otherwise Specified Output Voltage Swing AV = -1, RL = 100 A A Output Current AV = -1, RL = 50 A A Output Short Circuit Current Closed Loop Output Impedance Second Harmonic Distortion (AV = +2, RF = 464, VOUT = 2VP-P) Third Harmonic Distortion (AV = +2, RF = 464, VOUT = 2VP-P) TRANSIENT CHARACTERISTICS DC, AV = +2, RF = 464 10MHz 20MHz 10MHz 20MHz B B B B B B 25 Full 25, 85 -40 25 25 25 25 25 25 3 2.8 50 28 3.4 3 60 42 90 0.07 -50 -45 -55 -50 V V mA mA mA dBc dBc dBc dBc
AV = +2, RF = 464, Unless Otherwise Specified Rise Time Fall Time B B 25 25 0.8 1.25 ns ns
Rise and Fall Times (VOUT = 0.5VP-P)
3
HFA1205
Electrical Specifications
VSUPPLY = 5V, AV = +1, RF = 560, RL = 100, Unless Otherwise Specified (Continued) (NOTE 3) TEST LEVEL B B B B B B B B B B B TEMP. (oC) 25 25 25 25 25 25 25 25 25 25 25
PARAMETER Overshoot Slew Rate (VOUT = 4VP-P, AV = +1, +RS = 432) Slew Rate (VOUT = 5VP-P, AV = +2)
TEST CONDITIONS VOUT = 0.5VP-P, VIN t RISE = 2.5ns +SR -SR +SR -SR
MIN -
TYP 5 1050 750 1375 875 2250 1275 15 20 30 10
MAX -
UNITS % V/s V/s V/s V/s V/s V/s ns ns ns ns
Slew Rate (VOUT = 5VP-P, AV = -1, RF = 332) Settling Time (VOUT = +2V to 0V step)
+SR -SR To 0.1% To 0.05% To 0.02%
Overdrive Recovery Time VIDEO CHARACTERISTICS Differential Gain (f = 3.58MHz)
VIN = 2V AV = +2, RF = 464, Unless Otherwise Specified RL = 150 RL = 75
B B B B
25 25 25 25
-
0.03 0.03 0.03 0.05
-
% % Degrees Degrees
Differential Phase (f = 3.58MHz)
RL = 150 RL = 75
POWER SUPPLY CHARACTERISTICS Power Supply Range Power Supply Current C A A NOTE: 3. Test Level: A. Production Tested.; B. Typical or Guaranteed Limit Based on Characterization.; C. Design Typical for Information Only. 25 25 Full 4.5 5.6 5.4 5.8 5.9 5.5 6.1 6.3 V mA/ Op Amp mA/ Op Amp
Application Information
Optimum Feedback Resistor
Although a current feedback amplifier's bandwidth dependency on closed loop gain isn't as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier's unique relationship between bandwidth and RF. All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier's bandwidth is inversely proportional to RF. The HFA1205 design is optimized for a 464 RF at a gain of +2. Decreasing RF decreases stability, resulting in excessive peaking and overshoot (Note: Capacitive feedback will cause the same problems due to the feedback impedance decrease at higher frequencies). At higher gains the amplifier is more stable, so RF can be decreased in a trade-off of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth. For good channel-tochannel gain matching, it is recommended that all resistors (termination as well as gain setting) be 1% tolerance or better. Note that a series input resistor, on +IN, is required for a gain of +1, to reduce gain peaking and increase stability.
GAIN (ACL ) -1 +1 +2 BANDWIDTH (MHz) 360 280 400
RF () 332 464 (+RS = 432) 464
4
HFA1205
Non-inverting Input Source Impedance
SERIES OUTPUT RESISTANCE () 50
For best operation, the DC source impedance seen by the non-inverting input should be 50. This is especially important in inverting gain configurations where the noninverting input would normally be connected directly to GND.
40
30
PC Board Layout
The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended, while a solid ground plane is a must! Attention should be given to decoupling the power supplies. A large value (10F) tantalum in parallel with a small value (0.1F) chip capacitor works well in most cases. Terminated microstrip signal lines are recommended at the input and output of the device. Capacitance directly on the output must be minimized, or isolated as discussed in the next section. Care must also be taken to minimize the capacitance to ground seen by the amplifier's inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. To this end, it is recommended that the ground plane be removed under traces connected to -IN, and connections to -IN should be kept as short as possible.
20
AV = +1
10
AV = +2
0
0
50
100
150
200
250
300
350
400
LOAD CAPACITANCE (pF)
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs LOAD CAPACITANCE
Evaluation Board
The performance of the HFA1205 may be evaluated using the HA5023 Evaluation Board. The feedback and gain setting resistors must be replaced with the appropriate value (see "Optimum Feedback Resistor" section) for the gain being evaluated. Also, replace the two 0 series output resistors with 50 resistors. To order evaluation boards (Part Number HA5023EVAL), please contact your local sales office.
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly terminated transmission line will degrade the amplifier's phase margin resulting in frequency response peaking and possible oscillations. In most cases, the oscillation can be avoided by placing a resistor (RS) in series with the output prior to the capacitance. Figure 1 details starting points for the selection of this resistor. The points on the curve indicate the RS and CL combinations for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. Picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. RS and CL form a low pass network at the output, thus limiting system bandwidth well below the amplifier bandwidth of 280MHz (for AV = +1). By decreasing RS as CL increases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. In spite of this, bandwidth decreases as the load capacitance increases. For example, at AV = +1, RS = 62, CL = 40pF, the overall bandwidth is limited to 180MHz, and bandwidth drops to 70MHz at AV = +1, RS = 8, CL = 400pF.
5
HFA1205 Typical Performance Curves
200 AV = +2 150 OUTPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) 100 50 0 -50 -100 -150 -200 TIME (5ns/DIV.) 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 TIME (5ns/DIV.)
VSUPPLY = 5V, RF = Optimum Value From "Apps Info" Table, TA = 25oC, RL = 100, Unless Otherwise Specified
2.0 AV = +2
FIGURE 2. SMALL SIGNAL PULSE RESPONSE
FIGURE 3. LARGE SIGNAL PULSE RESPONSE
NORMALIZED GAIN (dB)
VOUT = 200mVP-P 3 0 -3 -6 AV = +2 AV = +1
AV = -1 NORMALIZED PHASE (DEGREES)
NORMALIZED GAIN (dB)
3 0 -3 -6 AV = +1 AV = +2
AV = -1
+180 +90 AV = +2 0 -90 AV = -1 AV = +1 1 10 100 FREQUENCY (MHz) -180 1000
0.3
1
10 FREQUENCY (MHz)
100
300
FIGURE 4. FREQUENCY RESPONSE
FIGURE 5. FULL POWER BANDWIDTH
VOUT = 200mVP-P 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 AV = +1 AV = +2 CROSSTALK (dB)
-40 -45 RL = 100 RL = 1k
NORMALIZED GAIN (dB)
-50 -55 -60 -65 -70 -75 -80 -85 1 10 FREQUENCY (MHz) 100 0.3 1
10 FREQUENCY (MHz)
100
FIGURE 6. GAIN FLATNESS
FIGURE 7. CROSSTALK vs FREQUENCY
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HFA1205 Die Characteristics
DIE DIMENSIONS: 69 mils x 92 mils x 19 mils 1750m x 2330m x 483m METALLIZATION: Type: Metal 1: AICu(2%)/TiW Thickness: Metal 1: 8kA 0.4kA Type: Metal 2: AICu(2%) Thickness: Metal 2: 16kA 0.8kA SUBSTRATE POTENTIAL (Powered Up): Floating (Recommend Connection to V-) PASSIVATION: Type: Nitride Thickness: 4kA 0.5kA TRANSISTOR COUNT: 180
Metallization Mask Layout
HFA1205
-IN1 OUT1 NC
V+ NC
OUT2 +IN1 NC NC
-IN2
V-
NC
NC
+IN2
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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